Issue

Vol. 18 (2026)

In-Sensor-Memory Computing for Post-Von Neumann Intelligence: A Perspective

https://doi.org/10.1007/s40820-026-02191-y
Hongyu Tang
College of Intelligent Robotics and Advanced Manufacturing, Fudan University, Shanghai 200433, People’s Republic of China
Ninghai Yu
College of Intelligent Robotics and Advanced Manufacturing, Fudan University, Shanghai 200433, People’s Republic of China
Pengsheng Min
College of Intelligent Robotics and Advanced Manufacturing, Fudan University, Shanghai 200433, People’s Republic of China
Ruiqian Guo
College of Intelligent Robotics and Advanced Manufacturing, Fudan University, Shanghai 200433, People’s Republic of China
Guoqi Zhang
EEMCS Faculty, Delft University of Technology, Delft 2628CD, The Netherlands

Corresponding Author: Ruiqian Guo

rqguo@fudan.edu.cn

Nano-Micro Letters, Vol. 18 (2026), Article Number: 338

Abstract

The rapid growth of artificial intelligence, ubiquitous sensing, and edge computing is exposing fundamental limitations of conventional von Neumann architectures, in which the physical separation of sensing, memory, and computation leads to excessive data movement, high energy consumption, and latency. As transistor scaling slows in the post-Moore era, architectural innovation has become essential to sustain progress in intelligent systems. In-sensor-memory computing (ISMC) addresses these challenges by co-locating perception, storage, and computation within unified device and system architectures, enabling in situ signal processing, mixed-signal computation, and event-driven intelligence at the data source. Recent advances in memristive and ferroelectric devices, low-dimensional and multifunctional materials, three-dimensional heterogeneous integration, and neuromorphic architectures have significantly expanded the functional scope of ISMC platforms. In parallel, the co-evolution of algorithms—including spiking neural networks, reservoir computing, and neuromorphic compilers—has facilitated the translation of device-level advantages into system-level performance. This perspective surveys the technological foundations, architectural trends, and emerging applications of ISMC, examines global industry–academia–research (IAR) collaboration, and outlines key challenges related to variability, reliability, scalability, and benchmarking. Collectively, ISMC is positioned as a post-von Neumann hardware paradigm for energy-efficient, distributed intelligence.


Highlights:
1 In-sensor-memory computing (ISMC) resolves von Neumann bottlenecks via synergistic innovations across multi-dimensional functional materials, hybrid architectures, and algorithm-hardware co-design.
2 This paradigm empowers ultra-low-latency edge applications, paving the way for autonomous systems, bio-integrated healthcare, and decentralized swarm intelligence.
3 Translating ISMC into scalable commercialization necessitates global Industry-Academia-Research collaboration, application-centric benchmarking protocols, and cross-disciplinary ecosystem enablers.

Keywords

In-sensor-memory computing (ISMC) Post-von Neumann intelligence Neuromorphic hardware Industry–academia–research (IAR)
Tang, Hongyu, Ninghai Yu, Pengsheng Min, Ruiqian Guo, and Guoqi Zhang. 2026. “In-Sensor-Memory Computing for Post-Von Neumann Intelligence: A Perspective”. Nano-Micro Letters 18 (April):338. https://doi.org/10.1007/s40820-026-02191-y.
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