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Vol. 3 No. 1 (2011)

Efficient CNTFET-based Ternary Full Adder Cells for Nanoelectronics

https://doi.org/10.1007/BF03353650
Mohammad Hossein Moaiyeri
Faculty of Electrical and Computer Engineering, Shahid Beheshti University, G. C., Tehran, Iran
Reza Faghih Mirzaee
Nanotechnology and Quantum Computing Lab., Shahid Beheshti University, G. C., Tehran, Iran
Keivan Navi
Faculty of Electrical and Computer Engineering, Shahid Beheshti University, G. C., Tehran, Iran
Omid Hashemipour
Faculty of Electrical and Computer Engineering, Shahid Beheshti University, G. C., Tehran, Iran

Corresponding Author: Mohammad Hossein Moaiyeri

h_moaiyeri@sbu.ac.ir

Nano-Micro Letters, Vol. 3 No. 1 (2011), Article Number: 43-50

Abstract

This paper presents two new efficient ternary Full Adder cells for nanoelectronics. These CNTFET-based ternary Full Adders are designed based on the unique characteristics of the CNTFET device, such as the capability of setting the desired threshold voltages by adopting proper diameters for the nanotubes as well as the same carrier mobilities for the N-type and P-type devices. These characteristics of CNTFETs make them very suitable for designing high-performance multiple-Vth structures. The proposed structures reduce the number of the transistors considerably and have very high driving capability. The presented ternary Full Adders are simulated using Synopsys HSPICE with 32 nm CNTFET technology to evaluate their performance and to confirm their correct operation.

Keywords

CNTFET Multiple-Valued logic Ternary logic Ternary Full Adder Multiple-Vth design
Moaiyeri, Mohammad Hossein, Reza Faghih Mirzaee, Keivan Navi, and Omid Hashemipour. 2011. “Efficient CNTFET-Based Ternary Full Adder Cells for Nanoelectronics”. Nano-Micro Letters 3 (1):43-50. https://doi.org/10.1007/BF03353650.
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